? semiconductor components industries, llc, 2012 january, 2012 ? rev. 11 1 publication order number: mc3403/d mc3403, mc3303 single supply quad operational amplifiers the mc3403 is a low cost, quad operational amplifier with true differential inputs. the device has electrical characteristics similar to the popular mc1741c. however, the mc3403 has several distinct advantages over standard operational amplifier types in single supply applications. the quad amplifier can operate at supply voltages as low as 3.0 v or as high as 36 v with quiescent currents about one third of those associated with the mc1741c (on a per amplifier basis). the common mode input range includes the negative supply, thereby eliminating the necessity for external biasing components in many applications. the output voltage range also includes the negative power supply voltage. features ? short circuit protected outputs ? class ab output stage for minimal crossover distortion ? true differential input stage ? single supply operation: 3.0 v to 36 v ? split supply operation: 1.5 v to 18 v ? low input bias currents: 500 na max ? four amplifiers per package ? internally compensated ? similar performance to popular mc1741c ? industry standard pin ? outs ? esd diodes added for increased ruggedness ? pb ? free packages are available 3.0 v to 36 v single supply v ee , gnd 1 2 3 4 v cc v cc 2 3 4 v ee 1.5 v to 18 v 1.5 v to 18 v split supplies 1 marking diagrams x = 3 or 4 a = assembly location wl = wafer lot yy, y = year ww = work week g = pb ? free package pdip ? 14 p suffix case 646 1 14 pin connections 1 2 3 4 5 6 78 9 10 11 12 13 14 - + - + - + - + out 1 inputs 1 v cc v ee /gnd inputs 2 out 2 out 4 inputs 4 inputs 3 out 3 1 2 4 3 (top view) 1 14 mc3x03p awlyywwg http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information soic ? 14 d suffix case 751a 14 1 mc3x03dg awlyww 1 14
mc3403, mc3303 http://onsemi.com 2 ordering information device package shipping ? mc3303d soic ? 14 55 units / rail mc3303dg soic ? 14 (pb ? free) mc3303dr2 soic ? 14 2500 tape & reel mc3303dr2g soic ? 14 (pb ? free) mc3303p pdip ? 14 25 units / rail mc3303pg pdip ? 14 (pb ? free) mc3403d soic ? 14 55 units / rail MC3403DG soic ? 14 (pb ? free) mc3403dr2 soic ? 14 2500 tape & reel mc3403dr2g soic ? 14 (pb ? free) mc3403p pdip ? 14 25 units / rail mc3403pg pdip ? 14 (pb ? free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. maximum ratings rating symbol value unit power supply voltages single supply split supplies v cc v cc , v ee 36 18 vdc input differential voltage range (note 1) v idr 36 vdc input common mode voltage range (notes 1 and 2) v icr 18 vdc storage temperature range t stg ? 55 to +125 c operating ambient temperature range mc3303 mc3403 t a ? 40 to +85 0 to +70 c junction temperature t j 150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. split power supplies. 2. for supply voltages less than 18 v, the absolute maximum input voltage is equal to the supply voltage.
mc3403, mc3303 http://onsemi.com 3 electrical characteristics (v cc = +15 v, v ee = ? 15 v for mc3403; v cc = +14 v, v ee = gnd for mc3303 t a = 25 c, unless otherwise noted.) characteristic symbol mc3403 mc3303 unit min typ max min typ max input offset voltage t a = t high to t low (note 3) v io ? ? 2.0 ? 10 12 ? ? 2.0 ? 8.0 10 mv input offset current t a = t high to t low i io ? ? 30 ? 50 200 ? ? 30 ? 75 250 na large signal open loop voltage gain v o = 10 v, r l = 2.0 k t a = t high to t low a vol 20 15 200 ? ? ? 20 15 200 ? ? ? v/mv input bias current t a = t high to t low i ib ? ? ? 200 ? ? 500 ? 800 ? ? ? 200 ? ? 500 ? 1000 na output impedance f = 20 hz z o ? 75 ? ? 75 ? input impedance f = 20 hz z i 0.3 1.0 ? 0.3 1.0 ? m output voltage range r l = 10 k r l = 2.0 k r l = 2.0 k , t a = t high to t low v o 12 10 10 13.5 13 ? ? ? ? 12 10 10 12.5 12 ? ? ? ? v input common mode voltage range v icr +13 v ? v ee +13 v ? v ee ? +12 v ? v ee +12.5 v ? v ee ? v common mode rejection r s 10 k cmr 70 90 ? 70 90 ? db power supply current (v o = 0) r l = i cc , i ee ? 2.8 7.0 ? 2.8 7.0 ma individual output short ? circuit current (note 4) i sc 10 20 45 10 30 45 ma positive power supply rejection ratio psrr+ ? 30 150 ? 30 150 v/v negative power supply rejection ratio psrr ? ? 30 150 ? 30 150 v/v average temperature coefficient of input offset current t a = t high to t low i io / t ? 50 ? ? 50 ? pa/ c average temperature coefficient of input offset voltage t a = t high to t low v io / t ? 10 ? ? 10 ? v/ c power bandwidth a v = 1, r l = 10 k v o = 20 v(p ? p), thd = 5% bwp ? 9.0 ? ? 9.0 ? khz small ? signal bandwidth a v = 1, r l = 10 k v o = 50 mv bw ? 1.0 ? ? 1.0 ? mhz slew rate a v = 1, v i = ? 10 v to +10 v sr ? 0.6 ? ? 0.6 ? v/ s rise time a v = 1, r l = 10 k v o = 50 mv t tlh ? 0.35 ? ? 0.35 ? s fall time a v = 1, r l = 10 k v o = 50 mv t tlh ? 0.35 ? ? 0.35 ? s overshoot a v = 1, r l = 10 k v o = 50 mv os ? 20 ? ? 20 ? % phase margin a v = 1, r l = 2.0 k , v o = 200 pf m ? 60 ? ? 60 ? crossover distortion (v in = 30 mvpp,v out = 2.0 vpp, f = 10 khz) ? ? 1.0 ? ? 1.0 ? % 3. mc3303: t low = ? 40 c, t high = +85 c, mc3403: t low = 0 c, t high = +70 c 4. not to exceed maximum package power dissipation.
mc3403, mc3303 http://onsemi.com 4 electrical characteristics (v cc = 5.0 v, v ee = gnd, t a = 25 c, unless otherwise noted.) characteristic symbol mc3403 mc3303 unit min typ max min typ max input offset voltage v io ? 2.0 10 ? ? 10 mv input offset current i io ? 30 50 ? ? 75 na input bias current i ib ? ? 200 ? 500 ? ? ? 500 na large signal open loop voltage gain r l = 2.0 k a vol 10 200 ? 10 200 ? v/mv power supply rejection ratio psrr ? ? 150 ? ? 150 v/v output voltage range (note 5) v or v pp r l = 10 k , v cc = 5.0 v 3.3 3.5 ? 3.3 3.5 ? r l = 10 k , 5.0 v cc 30 v v cc ? 2.0 v cc ? 1.7 ? v cc ? 2.0 v cc ? 1.7 ? power supply current i cc ? 2.5 7.0 ? 2.5 7.0 ma channel separation f = 1.0 khz to 20 khz (input referenced) cs ? ? 120 ? ? ? 120 ? db 5. output will swing to ground with a 10 k pull down resistor. figure 1. representative schematic diagram (1/4 of circuit shown) v ee (gnd) v cc output q23 inputs + q2 q3 q4 q5 q6 q7 q8 q9 q10 q11 q12 q13 q15 q16 q17 q18 q19 q20 q21 q22 q1 q24 q25 q27 q28 q29 q30 60 k 37 k 25 40 k 2.4 k 2.0 k 31k 5.0 pf bias circuitry common to four amplifiers -
mc3403, mc3303 http://onsemi.com 5 circuit description figure 2. inverter pulse response 20 s/div 5.0 v/div the mc3403/3303 is made using four internally compensated, two ? stage operational amplifiers. the first stage of each consists of differential input device q24 and q22 with input buffer transistors q25 and q21 and the differential to single ended converter q3 and q4. the first stage performs not only the first stage gain function but also performs the level shifting and transconductance reduction functions. by reducing the transconductance, a smaller compensation capacitor (only 5.0 pf) can be employed, thus saving chip area. the transconductance reduction is accomplished by splitting the collectors of q24 and q22. another feature of this input stage is that the input common mode range can include the negative supply or ground, in single supply operation, without saturating either the input devices or the differential to single ? ended converter. the second stage consists of a standard current source load amplifier stage. the output stage is unique because it allows the output to swing to ground in single supply operation and yet does not exhibit any crossover distortion in split supply operation. this is possible because class ab operation is utilized. each amplifier is biased from an internal voltage regulator which has a low temperature coefficient, thus giving each amplifier good temperature characteristics as well as excellent power supply rejection. figure 3. sine wave response figure 4. open loop frequency response a open loop voltage gain (db) 1.0 10 100 1.0 k 10 k 100 k 1.0 m f, frequency (hz) -20 0 20 40 60 80 100 120 , large signal vol 50 s/div 50 mv/div 0.5 v/div a v = 100 *note class a b output stage produces distortion less sinewave. v cc = 15 v v ee = -15 v t a = 25 c v o , output voltage (v ) pp figure 5. power bandwidth figure 6. output swing versus supply voltage f, frequency (hz) 1.0 k 10 k 100 k 1.0 m -5.0 0 5.0 10 15 20 25 30 t a = 25 c o +15 v -15 v 10 k v o - + v o 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20 v cc and (v ee ), power supply voltages (v) 0 20 30 10 t a = 25 c , output voltage range (v pp)
mc3403, mc3303 http://onsemi.com 6 1 2 figure 7. input bias current versus temperature figure 8. input bias current versus supply voltage t, temperature ( c) -75 -55 -35 -15 5.0 25 45 65 85 105 125 100 200 300 , input bias current (na) i ib , input bias current (na) i ib v cc and (v ee ), power supply voltages (v) 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20 150 160 170 figure 9. voltage reference figure 10. wien bridge oscillator - + v cc 10 k r1 r2 v o v cc 10 k v o = v o = v cc r1 r1 +r2 1 2 1/2 mc3403 - + 10 k v o v cc 50 k 5.0 k r c c r v ref = v cc f o = 1 2 rc f o = 1.0 khz r = 16 k c = 0.01 f 1/2 mc3403 v ref v cc = 15 v v ee = -15 v t a = 25 c 1n914 1n914 for: 1 c 1 c figure 11. high impedance differential amplifier figure 12. comparator with hysteresis + ? e 1 e 2 r e o r b r1 r1 e o = c (1 +a +b) (e 2 ? e 1 ) 1/2 mc3403 1/2 mc3403 1/2 mc3403 a r1 - - + + r r r1 r1 +r2 - + v ref v in r1 r2 v o v o v oh v ol v inl v inh v ref hysteresis v inl = v inh = v h = (v ol -v ref ) +v ref (v oh -v ref ) +v ref (v oh -v ol ) 1/2 mc3403 r1 r1 +r2 r1 r1 +r2
mc3403, mc3303 http://onsemi.com 7 1 2 1 2 1 2 rc figure 13. bi ? quad filter v ref = v cc - + r2 c1 v in v ref v ref v ref v ref r 100 k 100 k r2 r1 r3 c1 bandpass output r = 160 k c = 0.001 f r1 = 1.6 m r2 = 1.6 m r3 = 1.6 m = center frequency gain = passband notch gain f o = r1 = qr r2 = r3 = t n r2 c1 = 10 c f o q t bp t n r1 t bp r c c notch output 1/2 mc3403 1/2 mc3403 1/2 mc3403 1/2 mc3403 - - - + + + 1 2 figure 14. function generator v ref = v cc triangle wave output v ref square wave output v ref r2 r3 75 k 300 k r1 100 k r f c - f = r1 +r c if r3 = r2 r1 r2 +r1 + 1/2 mc3403 1/2 mc3403 - + q f o c figure 15. multiple feedback bandpass filter 1/2 mc3403 - + v in r1 c c r3 v cc v o c o c o = 10 c v ref r2 v ref = v cc f o = center frequency given: a(f o ) = gain at center frequency choose value f o , c then: r3 = r2 = r1 = for less than 10% error from operational amplifier where f o and bw are expressed in hz. if source impedance varies, filter may be preceded with voltage follower buffer to stabilize filter parameters. r3 2 a(f o ) r1 r5 4q 2 r1 -r5 o o f o < 0.1 bw for: = 1.0 khz = 10 = 1 = 1 where: t bp t n 4 cr f r1
mc3403, mc3303 http://onsemi.com 8 package dimensions soic ? 14 case 751a ? 03 issue h notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. ? a ? ? b ? g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t ? t ? f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019 7.04 14x 0.58 14x 1.52 1.27 dimensions: millimeters 1 pitch soldering footprint* 7x *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc3403, mc3303 http://onsemi.com 9 package dimensions pdip ? 14 case 646 ? 06 issue p 17 14 8 b a dim min max min max millimeters inches a 0.715 0.770 18.16 19.56 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l m ??? 10 ??? 10 n 0.015 0.039 0.38 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. f hg d k c seating plane n ? t ? 14 pl m 0.13 (0.005) l m j 0.290 0.310 7.37 7.87 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. mc3403/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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